1. Field of the Invention
The present invention relates to current-mirror circuits and, more particularly, to current-mirror circuits composed mainly of unipolar transistors such as metal-oxide semiconductor transistors.
2. Description of the Related Art
Current-mirror circuits have found extensive applications in the technical field of analog electronic circuits, such as simple bias circuits, operational amplifiers, monolithic analog-to-digital converters, etc.
In general, with most electronic equipment using a current-mirror circuit, it is required that the frequency bandwidth of a current signal that the current-mirror circuit handles be as high as possible. If the frequency bandwidth of the current signal decreases, the performance of electronic equipment using the current-mirror circuit would be degraded.
With a presently available current-mirror circuit which has a pair of first and second metal-oxide semiconductor (MOS) transistors of a selected channel type, a third MOS transistor is provided additionally in order to maximize the frequency bandwidth of a current signal that the current-mirror circuit handles. The additional transistor is connected to the current input terminal of the current-mirror circuit and a common connection node of gate electrodes of the paired MOS transistors. The additional MOS transistor is the same as the paired MOS transistor in polarity, and has a source follower configuration. Thus, if the first and second MOS transistors are, for example, NMOS FETs, the third transistor will also be an NMOS FET. The third MOS transistor is connected at its drain electrode to the common-connected gate electrodes of the first and second MOS transistors, and connected at its gate electrode to the current input terminal of the current-mirror circuit. The third transistor is fed by a current source associated therewith. The third transistor serves as a "buffer" which can "free" the current signal input terminal from the influence of gate capacitances of the first and second MOS FETs. In this sense the third transistor may be called the "buffering transistor."
The third transistor, i.e., the buffering transistor can arbitrarily be set so that its bias current may become larger than an input current at the current input terminal of the current-mirror circuit and at the same time it is allowed to have an increased area. Thus, the polarity at the common connection node of the gate electrodes of the paired MOS transistors can be shifted to have a frequency higher than that at the input terminal, whereby the frequency bandwidth of the current-mirror circuit can be improved.
Using such a conventional circuit arrangement, however, the operating voltage level of the current-mirror circuit itself will increase This is because the addition of the buffering transistor of the same polarity as the paired main transistors increases the bias voltage substantially at the current input terminal by a voltage corresponding to the threshold voltage of the buffering transistor. Such an increase in the operating voltage level of the current-mirror circuit will result in an increase in power dissipation of electronic equipment incorporating it.
As described above, the presently available current-mirror circuit using MOS FETs is suffering from two conflicting problems: maximization of frequency bandwidth; and minimization of operating voltage level. Although anyone of those skilled in the art have felt that these problems are to be solvable, a satisfactory solution for them has not been found.